Digital-Mixed-Signal Verification Engineer (m/f/d)

SummaryPosted: Weekly Hours: 38.5 Role Number:200480187Imagine what you could do here. At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a transformational and unusually dedicated Digital-Mixed-Signal Verification Engineer. As a member of our dynamic group, you will have the rare and great opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers daily.As a verification engineer, you have ownership of functional analog macro sign-off which includes the communication of status and results into the existing verification management framework.Key QualificationsExperience in analog design is a mustExperience with digital simulation tools like Cadence NCsim, Synopsis VCS, Mentor Modelsim, and/or Mixed Signal simulation tools (such as Cadence AMS-Designer, Synopsis VCSXA, Mentor Questa).Ability to read and understand schematics to define and implement functional behavioral modelsAbility to think on different abstraction levels from very detailed components to system-levelIdeally, 3+ years of experience in hardware description languages like System Verilog, VHDL, and Verilog is desiredOutstanding sense and drive for the quality of work you're doingVerification mindset and approachReliable, ability to work independently as well as in a team environmentGood interpersonal and communication skillsC/C++ programming language for test case development is a plusProficient English skills are a requirementSystem know-how in the cellular RF transceiver domain is an advantageDescriptionIn this position you will be developing analog behavioral models in System Verilog, running model versus schematic correlation simulations to guarantee the matching to the schematic specifications, defining/verifying verification requirements, coding of test scenarios and assertions, doing sub-/system verification with existing UVM top-level test benches, interacting with analog and digital design engineers, firmware engineers, RF layout engineers.This role is available for a Digital-Mixed-Signal Verification engineer who will enable bug-free first silicon for the digital-/analog- and mixed-signal designs. The responsibilities include all phases of pre-silicon verification including developing and verifying analog behavioral models (e.g. LNA, PLL, ADC, DAC, Mixer) in System Verilog at different abstraction levels, matching the schematic specifications till the pre-silicon sub-/system verification with main respect to Analog/Mixed-Signal macros in close collaboration with multiple teams.Education & ExperienceBachelor’s or Master's degree in Electrical Engineering or Computer Engineering, Mechatronics, Electronics, or equivalent.Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics. If you’d like more information about your EEO rights as an applicant. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.Additional RequirementsThe minimum salary pursuant to the CBA amounts to 60,214 gross per year for full-time employment. Actual salaries are oriented at current market salaries and take your qualifications and experience into account.